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 Post subject: Phase Lock Loop Problem
PostPosted: Oct Thu 04, 2018 3:12 am 
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Greetings to the Forum:

In order to avoid a second thread on the same piece of gear, I have added onto the end of this one. It was titled
Quote:
Power Supply Strangeness.


I have changed title to reflect the new issue. Please scroll to the last post.

I have run into a puzzle which I'm pretty sure is an error in the schematic. However, I though I'd check here and see if anyone can make sense out of the thing the way it is drawn.

The equipment in question is a TFT 723 FM modulation monitor. The entire manual including the schematics I am working from can be down loaded here:

http://www.steampoweredradio.com/pdf/tf ... Manual.pdf

I reproduce the relevant portion of the power supply schematic below:

Attachment:
TFT Power Supply Huh.jpg
TFT Power Supply Huh.jpg [ 26.58 KiB | Viewed 1005 times ]


Note the locations circled in red. The notation clearly shows these two points to be connected together. Now note the grounds that I have drawn in. These are to be inferred from notations and the schematic of the A6 power supply card.

This doesn't seem quite right to me. Any thoughts?

Note to moderator.... the TFT 723 is a piece of test equipment... sort of. If this is the wrong Forum; please move.

Thanks,

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Jim T.
KB6GM


Last edited by Jthorusen on Oct Fri 26, 2018 8:37 am, edited 1 time in total.

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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Thu 04, 2018 3:48 am 
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Location: Albuquerque, NM 87123
Jthorusen wrote:
These are to be inferred from notations and the schematic of the A6 power supply card.
,


Just what notations infer that a 140 VAC supply goes to chassis ground? Have you done continuity checks to confirm this is so?


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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Thu 04, 2018 6:50 am 
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Greetings to Johnnysan and the Forum:

Please note the schematic label for the common negative point between the two bridges... it says "GND BUSS". It also says that that point connects to pin 9 of the A6 card, which is the power supply regulator card. I didn't provide that schematic, figuring that it would be more readable if one went to the down load link and downloaded it for oneself. However, on that schematic, A6, pin 9 is labeled "FROM CHASSIS GND" AND "FROM CH-CR1 (-)". In this manual, "CH" appears to reference the chassis, so CH-CR1(-) means the negative terminal of the bridge labeled CR1, mounted on the chassis. Also on the A6 schematic, pin 16 is labeled "TO T1-5" and "GROUND" Card A6 pins 16 and 17 are tied together. T1 terminal 5 is the low end of the 140 volt winding. The chassis interconnect diagram shows A6 pins 16 and 17 as "GND"

So, the grounds on the schematic segment appear to be as I drew them.

As far as measuring the equipment is concerned, it is still in transit from the East coast. It is expected next week, when a number of questions will be resolved by an examination of the actual equipment. In the meantime, I decided to order a new set of power supply electrolytics for the thing from Digikey, and this peculiarity came to light while working up the cap order.

I hope this answers your questions.

Thanks,

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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Thu 04, 2018 7:39 am 
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Maybe I'm just getting lazy or suffering the after effects of a bad cold, but tracing through pins on that layout seems to be an exercise in futility. Aren't many of the card plugs labeled P1 or P/0 P1? I'm getting no where trying to see the actual ground of A6/16. And BTW, isn't 140 AC a little high for an oven?

I can see why they chose model number TFT 723; it uses enough LM723 ICs.


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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Thu 04, 2018 7:58 am 
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Greetings to Johnnysan and the Forum:

Yes, I agree.... the actual connection to the chassis is not shown; only talked about. The connection to the oven is what has me scratching my head.... not only would it be a bit much for an oven, but it would actually buck or boost the 25 volt supply depending on phase.

The actual purpose for the 140 volt winding is to feed a 1/2 wave rectifier and filter to provide 170 VDC for nixie tubes... there are six of them in a front panel display that will show the carrier frequency error in Hz or can be switch selected to provide a frequency counter function counting whatever you put into a front panel BNC.

If you have the matching 724 stereo monitor, it will also display the stereo pilot frequency and SCA frequency if present. Moot point for me; I don't have a 724.

Regards,

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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Thu 04, 2018 3:02 pm 
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Had to study this a while but yes, it appears to be a mistake on the schematic. The top part you have circled (+20V unregulated) goes to A8-2, (labeled as CH-CR1 as you circled it below) but it definitely does not go to A6-15 as they marked it. A6-15 is supplied 140 VAC from #6 on the transformer through front panel switch S9.

-Mark-

Edit- The blobby marking on the schematic is not A6-15 but rather A6-19 which makes sense. They mark this as +20V unregulated at A8-2, yet mark it as +25V unregulated at A6-19.


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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Thu 04, 2018 8:54 pm 
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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Fri 05, 2018 12:00 am 
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Greetings to Mark and the Forum:

I believe you have found it! Many thanks.... that saved me a lot of head scratching. VERY nice work... spotting that. Thank You very much!

Regards,

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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Fri 05, 2018 12:20 am 
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Again, Greetings to Mark and the Forum:

Thanks to my learning from your photo-interpretive skills, Mark, I have resolved the two remaining difficulties with the power supply drawing. First, the common point between the two bridges is not T1 Terminal 5, but T1 Terminal 9. Secondly, the high end of the 140 volt winding (T1-6) does not go to the 33 ohm resistor and zener associated with the oven. They are just drawn in such close proximity that I thought that it was one line. With the discovery that these two points are not common and the correction on the transformer terminal number taken together with your discovery, all weirdness has now been resolved.

Again, Thank You for your help.

Regards,

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 Post subject: Re: Power Supply Strangeness
PostPosted: Oct Fri 05, 2018 2:28 am 
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Glad it makes sense now. A bit of sloppy draftsmanship on that schematic, I can see where everyone would get confused.

-Mark-


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 Post subject: Re: Phase Lock Loop Problem
PostPosted: Oct Fri 26, 2018 9:12 am 
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Greetings to the Forum:

I have run into a strange problem with a phase locked loop circuit. This is used to generate the L.O. in a TFT 723 modulation monitor.

( Schematic here; see board A2, L.O. Board ): http://www.steampoweredradio.com/pdf/tf ... Manual.pdf

The problem is this: The loop locks up nicely and is very stable. It is close to being on frequency. I can turn the slug in the VCO coil and vary the varacter voltage from less than 1 volt to almost 10 volts and the frequency remains stable with the loop locked. (Nominal varacter volts is about 4 volts according to the manual.)

Unfortunately, it is about 90 Hz low in frequency (varies slightly from about 85 to about 95 Hz). Because the unit has a built-in frequency counter to display the carrier frequency as a plus or minus so many Hz error, it would be nice if the box didn't display a 90 Hertz error when the carrier frequency is right on.

There are only three decades in the divide by N circuit; the output is at 200 KHz which is the frequency at which the phase comparator operates. If the divide by N were mis-programmed, the frequency error would be a multiple of 200 KHz. I just can't seem to figure out why the loop would be off by 90 Hz.

There is a block diagram in the manual, but briefly the PLL scheme is this:

The unit has a 5 MHz ovenized crystal time base which is the reference for everything. A harmonic of this time base is used to mix with the L.O. (VCO) to get a frequency below 15 MHz. This frequency is fed to a three stage divide by N BCD counter. This counter is so arranged to accomplish a division by N which results in a 200 KHz signal. This 200 KHz signal is phase compared to a 200 KHz signal that is divided down from the 5 MHz reference. The output of the phase comparator is applied to a varactor diode in the VCO as an error voltage to bring it on frequency.

In my specific instance, the unit is set up to receive 91.5 MHz. According to theory, the L.O. frequency is therefore 102.200000 MHz. The harmonic of the 5 MHz reference used is the 19th harmonic or 95 MHz. This results in a mixer output of 7.200000 MHz. This mixer output is divided by 36 in the divide by N chain to produce a 200 KHz output. This 200 KHz is one input to the phase comparator. The other input is 200 KHz derived from the 5 MHz reference. The phase comparison produces an error voltage which is applied to a varactor in the VCO, locking the loop.

All of these frequencies are correct.... except, the VCO output is 102.199905 MHz. ..... not 102.200000. The only thing I can think of is a trick from my TV transmitter days.... we used coaxial line stretchers to ensure that the transmitters were being driven with the correct phase so that their outputs were 90 degrees different so they could be combined in a hybrid. I was thinking, therefore, that I might want to introduce a delay into one or the other of the 200 KHz signals entering the phase comparator. Except that to introduce any meaningful number of degrees of phase difference at 200 KHz, I'd need a mile of coax. :D

So.... any ideas?

Thanks,

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 Post subject: Re: Phase Lock Loop Problem
PostPosted: Oct Fri 26, 2018 10:08 am 
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Only a hunch.....I wonder if the phase comparator can be fooled by artifacts in the signals being compared. Can you set up a standalone test of each functional element?....in the case of the comparator, test it with signals from a different source...eg a laboratory function generator vs. the decade counters.

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"Measure voltage, but THINK current." --anon.


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 Post subject: Re: Phase Lock Loop Problem
PostPosted: Oct Fri 26, 2018 5:31 pm 
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Just because the crystal is ovenized etc doesn't mean it is accurate. 90hz is 18ppm on a 5Mhz crystal. Maybe the crystal is just off a little?

Tony

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 Post subject: Re: Phase Lock Loop Problem
PostPosted: Oct Sat 27, 2018 1:16 am 
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What TonyC said. The crystal has drifted and the 5MHz standard needs to be adjusted per page 5-1 of the manual.

Usually on those ovens there/s a little plug that you can pop off to get a screwdriver or hex tool in to adjust it. Sometimes there's just a hole.

There's plenty of mumbo jumbo on how to do this in the manual, but the easiest way is to tune in WWV at the highest frequency you can receive it (10, 15, or 20 MHz) and adjust the standard for zero beat with WWV.


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 Post subject: Re: Phase Lock Loop Problem
PostPosted: Oct Sat 27, 2018 3:16 am 
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Greetings to Tony, W3JN and the Forum:

I came to the same conclusion myself.

I must confess, I had not previously read the procedure for setting the crystal reference oscillator on frequency. What I did read is that the 5 MHz reference is divided down to 1 MHz and appears on a front panel BNC jack so that the time base may be checked against an external reference. So.... that's what I did when I first started working on the thing. I counted that jack with my HP 5340A and set the output to exactly 1 MHz.

Now, I just recently calibrated the 5340A (which has the high accuracy time base option) against a pair of Rubidium atomic standards that I have, and I am pretty sure it is good to 1 part in ten to the 10th..... certainly better than 1 part in ten to the eighth... which is only 1 Hz at 100 MHz, which is the frequency of interest.

Counting the 1 MHz output turns out to be a mistake.... it is virtually worthless when it comes to assessing the accuracy of the internal time base. Consider: The 5 MHz time base is divided down to 1 MHz to get the 1 MHz output. This divides the error by five as well. If you then factor in the one count ambiguity that is present with any digital counter, you can have an error in the time base of as much as 10 Hz. Even if the one count ambiguity is not a factor, the error can be as much as 5 Hz.

Now, the reference for the phase lock loop is generated by multiplying the 5 MHz time base by (in this case) 19. Interestingly enough, if you divide the 90 Hz error shown on the counter (which is also a 90 Hz error in the 10.7 MHz IF) by 19, you get pretty close to 5 Hz. Which is the minimum error you can see when using the front panel 1 MHz sample.

So, I haven't bothered to actually count the time base. I know the input frequency within 1 or 2 Hz thanks to the 5340A. So, I just tweaked the trimmer on the TFT reference until the on-board counter showed the same error as the 5340A and called it a day.

Thanks to all who responded. Since I thought of it independently, I flatter myself with the old saying: "Great minds think alike." :D

Now, on to other challenges.... Repairing the burnt spots in the counter board so I can have six digits instead of just three. Figuring out why the peak flasher detectors disagree on the calibrate signal (electrolytics, I hope, as I already ordered them). Then the big challenge.... moving the thing from 91.5 to 98.7. This may involve winding coils.

Oh well, it keeps me off the streets and out of trouble. :D

Regards,

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Jim T.
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